1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method, in particular to a method of manufacturing a semiconductor device capable of reducing leak current in a device isolation region.
2. Description of the Related Art
In a semiconductor device, while the main surface of a semiconductor substrate is separated into device formation regions which are mutually electrically independent by a device isolation insulating film, current is often generated by the interface trapped state and/or crystal defects at the semiconductor/insulating-film interface to increase leak current. For example, in case of manufacturing a one-transistor type DRAM, the surface of a P-type silicon substrate is selectively oxidized by the LOCOS method to form a device isolation insulating film consisting of a silicon oxide film and form device formation regions divided by the device isolation insulating film. A gate insulating film and a gate electrode are formed in the device formation region and N-type impurity ions are implanted into the device formation region of the silicon substrate to thereby form a source region and a drain region. After forming an interlayer insulating film, a contact hole is formed in the source region, and a capacitance electrode for information storage, a capacitance insulating film and an opposing electrode serving as a data line are formed in the contact hole to thereby constitute a memory cell. In this DRAM, however, since the source region is formed in a region adjacent to the device isolation insulating film, the information stored in the capacitance electrode leaks from the source region through the interface between the device isolation insulating film and the semiconductor substrate, with the result that the holding characteristics of stored information to be recorded deteriorates. It is considered that leak current is generated because the device isolation insulating film formed by selective oxidation in the step of forming the device isolation insulating film causes the formation of the interface trapped state between the device isolation insulating film and the semiconductor substrate and crystal defects occur at the interface. considering this, a so-called interface trapped state lowering treatment for conducting a heat treatment at a temperature of 400 to 450.degree. C. for about 10 to 100 minutes under, for example, H.sub.2 atmosphere is conventionally conducted in a step after the device isolation insulating film is formed, so as to suppress leak current. There has also been proposed a heat treatment to repair the crystal defects at the interface.
As a heat treatment for repairing the crystal defects at the interface, annealing process for heating the substrate for relatively a long time using a furnace (this annealing using the furnace is referred to as "FA" hereinafter) is conventionally adopted. However, the FA which requires a long heating time, sometimes causes the redistribution of the impurity profile for an impurity diffused layer formed on the semiconductor substrate and the deterioration of device characteristics. For example, in the DRAM as described above, when the device having a guard ring formed immediately below the device isolation insulating film is subjected to FA, the effect of reducing leak current immediately below the device isolation insulating film can be obtained. However, the impurities of one conductivity type which constitute the guard ring immediately below the device isolation insulating film are diffused into the active region of the MOS transistor formed adjacent to the guard ring by this FA to thereby make the interface smoother, and particularly to narrow the channel width in gate width direction and deteriorate the transistor characteristics. Also, when the FA treatment is carried out after the source and drain region for the MOS transistor are formed, the impurity profile for the source and drain region is made smoother, to thereby decrease the channel length and deteriorate the transistor characteristics.
As can be seen from the above, according to the conventional semiconductor device manufacturing method, leak current caused by the interface trapped state and crystal defects generated during the formation of the device isolation insulating film, becomes conspicuous. Even if an interface trapped state lowering treatment is carried out, it is difficult to reduce the leak current which is considered to be resulted from the crystal defects. Moreover, if FA is conducted to repair the crystal defects, the impurity profile for the impurity layer formed on the semiconductor substrate is adversely affected to thereby deteriorate device characteristics. As a result, the FA for repairing the crystal defects is conventionally limited such that the step is conducted before the formation of the impurity layer. In the actual semiconductor substrate, however, the step of forming a device isolation insulating film is mainly conducted after forming the P-type well region or N-type well region in the semiconductor substrate and the impurity layer is already formed by the time when the device isolation insulating film is formed. Furthermore, there is recently proposed forming well regions only by ion implantation with high energy, which method disadvantageously makes the impurity profile for the high temperature heat treatment conducted in a later step smoother. For these reasons, it is substantially impossible to repair the crystal defects by conducting the FA without affecting the impurity profile.